Chapter8 - Frequency synthesizers and PLL

Ex 8.1 - page : 255

In [4]:
from __future__ import division
from math import sqrt, pi
VCC=6 #V
VEE=6 #V
RT=4 #kohm
CT=330 #pF
C=240 #pF
fo=0.3/(RT*1000*CT*10**-12)/1000 #kHz
print "Free running frequency is %0.f kHz " %fo
Vplus=(VCC-(-VEE))/2 #V
deltafL=8*fo/Vplus #kHz
print "Lock Range(+ve & -ve) is %0.f kHz " %deltafL 
#For LM 565
R=3.6 #kohm
deltafC=sqrt(deltafL*1000/(2*pi*R*1000*C*10**-12))/1000 #kHz
print "Capture Range(+ve & -ve) is %0.f kHz " %deltafC
deltafP=2*deltafC/2 #kHz
print "Pull-in Range is %0.f kHz " %deltafP 

Free running frequency is 227 kHz 
Lock Range(+ve & -ve) is 303 kHz 
Capture Range(+ve & -ve) is 236 kHz 
Pull-in Range is 236 kHz

Ex 8.2 - page : 256

In [10]:
from __future__ import division
from math import sqrt, pi, floor
fo=450 #kHz
deltafL=240 #kHz(+ve & -ve)
deltafC=40 #kHz(+ve & -ve)
Vplus=8*fo/deltafL #V
#Vplus=(VCC-(-VEE))/2 but |VCC|=|-VEE|
VCC=Vplus #V
VEE=Vplus #V
print "For the design |VCC|=|-VEE| is %d Volt" %VCC
RT=4.7 #kohm(Assumed for design)
R=3.6 #kohm
CT=0.3/(RT*1000*fo*1000)*10**12 #pF
C=1/((deltafC*10**3)**2*(2*pi*R*10**3)/(deltafL*1000))*10**9 #nF
print "Value of RT = %0.2f kohm " %RT
print "Value of CT = %0.f pF " %CT
print "Value of C = %0.f nF " % floor(C)

For the design |VCC|=|-VEE| is 15 Volt
Value of RT = 4.70 kohm 
Value of CT = 142 pF 
Value of C = 6 nF

Ex 8.3 - page : 264

In [12]:
from __future__ import division
from math import log
fmax=160 #kHz
fr=4 #Hz(Resolution)
M=2.4 #unitless
fclk=M*fmax #kHz
print "Clock frequency is %0.2f kHz " %fclk
N=log(fclk*1000/fr)/log(2) #no. of bits
print "No. of bits = %0.f " % round(N) 

Clock frequency is 384.00 kHz 
No. of bits = 17