Chapter 19: VLSI Technology and Circuits

Example 1, Page 555

In [2]:
#Variable declaration
ID=50*10**-6#ID=drain current in amperes
k=25*10**-6#k=ue/D in A/V**2
VDS=0.25#VDS=drain-to-source voltage
VGS=5#VGS=gate-to-source voltage
VTH=1.5#VTH=threshold voltage

#Calculations&Results
w=ID/(k*(VGS-VTH)*VDS)#w=W/L
print "W/L=%.2f"%w
P=VDS*ID#P=power dissipated by the transistor
print "The dissipated power is=%.1f uW"%(P*10**6)
VDD=5#VDD=drain supply voltage of given NMOS transistor
R=(VDD-VDS)/ID#R=load resistor to be connected in series with the drain
print "The load resistance is=%.f k ohm"%(R/1000)

W/L=2.29
The dissipated power is=12.5 uW
The load resistance is=95 k ohm

Example 2, Page 555

In [4]:
#Variable declaration
ID=50*10**-6#ID=drain current in amperes
k=25*10**-6#k=ue/D in A/V**2
VDEP=3

#Calculations&Results
l=(k*((-VDEP)**2))/(2*ID)#l=(L/W)=aspect ratio of the pull-up
print "Pull-up (L/W)=%.2f"%l
VGS=5#VGS=gate-to-source voltage
VTH=1#VTH=threshold voltage
VDs=4.75#VDs=the drain source voltage of the depletion mode pull-up in saturation
VDD=5#VDD=drain supply voltage of given NMOS inverter
#L/W=(k*(VGS-VTH)*VDS)/ID where L/W=pull down aspect ratio
l1=(k*(VGS-VTH)*(VDD-VDs))/ID#l1=L/W
print "Pull-down (L/W)=%.1f"%l1

Pull-up (L/W)=2.25
Pull-down (L/W)=0.5

Example 3, Page 555

In [6]:
#Variable declaration
w=10.#w=W/L value of the NMOS transistor in a CMOS inverter
un=1350#un=electron mobility for NMOS transistor in cm^2/V s
up=540#up=electron mobility for PMOS transistor in cm^2/V s

#Calculations
#(Wpu/Lpu)*up*(VINV-VDD-VTHP)^2=(Wpd/Lpd)*un*(VINV-VTHN)^2
#For a symmetrical inverter VINV=(VDD/2) and VTHN=(-VTHP)
#Also for input voltage=VDD/2 both transistors operate in saturation region
#Therefore,up*(Wpu/Lpu)=un*(Wpd/Lpd)
w1=(un*w)/up#w1=Wpu/Lpu=W/L value of the PMOS for a symmetrical inverter

#Result
print "W/L value of the PMOS transistor in a CMOS inverter is = %.f"%w1

W/L value of the PMOS transistor in a CMOS inverter is = 25

Example 4, Page 556

In [8]:
import math

#Variable declaration
f=2*10**9#f=clock frequency in Hz
VDD=3#VDD=drain supply voltage 
Cl=1*10**-12#C1=load capacitance in Farad
P=50.*10**-3#P=maximum power dissipation capability in W/stage

#Calculations
N=P/(f*Cl*VDD**2)#N=maximum permissible number of fan outs

#Results
print "N=%.1f"%N
print "The maximum permissible number of fan-outs is(integer just below actual value)=%.f"%math.floor(N)

N=2.8
The maximum permissible number of fan-outs is(integer just below actual value)=2

Example 5, Page 556

In [10]:
#Variable declaration
L=3*10**-6#L=length of an NMOS pass transistor in metres
VDS=0.5#VDS=drain-source voltage
u=1400*10**-4#u=electron mobility in m**2/V s

#Calculations
t=L**2/(VDS*u)#t=channel transit time

#Result
print "The transit time is=%.2f ns"%(t/10**-9)

The transit time is=0.13 ns

Example 6, Page 556

In [13]:
#Variable declaration
y=2#y=length unit in micrometres

#Calculations&Results
W=3*y#W=mimimum metal linewidth in micrometres
print "W=%.f um"%W
n=80#n=number of driven inverters
i=0.07#i=average current ratings in milliamperes
I=n*i#I=total currrent drawn by n inverters
print "I=%.1f mA"%I
#1mA per micrometre of aluminium line width is the maximum safe average current an aluminium wire can carry.
print "This needs a line at least width of %.1f um"%I

if (W>I):
    print "Above calculated minimum metal line-width (W) is thus the safe width of the metal line driving 80 inverters."

f=5#f=number of fanout lines
w=f*W#w=required metal line width
print "The metal line-width required to supply a fan-out of 5 lines is= %.f um"%w

W=6 um
I=5.6 mA
This needs a line at least width of 5.6 um
Above calculated minimum metal line-width (W) is thus the safe width of the metal line driving 80 inverters.
The metal line-width required to supply a fan-out of 5 lines is= 30 um